초록
In this dissertation, SLIC is divided into high-performance, low-power
consumption, high-voltage block and reliable low-voltage block and designed, to
realise complex function of line inteHaoe circuit. High-voltBge block is designed
using 70V BVCEO bipolar CSPA pocess parameter and low-voltage block is
designed using tOV 3Hm CMOS CSPA pocess parameter. Such integrated circuit
chipset pedorms most of its required Hnctions, without using transformer or
relay.
The cc☞e of SLIC is subscriber line 2-wire interface and analog 4-wire interface
block. Switching regulator that supplies power to subscriber line 2-wire inteface
block, power fEeding circuit that suHBies power te subscriber line 2-wire, sensing
circuit that senses 2-wire status is designed. The maximum current 150 mA flows
into switching regulator switch(L pin), and switch trunsient maximum OFF
voltage at L pin is 1 V.
In the design of two-wire inteface, a line driver has low oue)ut impedance and
high-current driving capability. A sensing amplif4er senses the line cunent to
synthesize both the DC and AC impedance. The simulation of 3-dB fe(iuency
versus DC current of a line driver shows above 900kHz, which is sufscient
bandwidth for voice signal. The simulation of oueiut impedance versus Ire(luency
of a line driver indicates the gain ermr rate below 0.O03dB at 16kHz. The
simulations of PSRR versus frequency of both a line driver and a sensing
amplifier show the values above 50dB at 117Hz.
Simulations gue performed to wove the appuowiety of desi☞5. Each simualtion
is .peformed using Meta-software HSPICE tool on a SUN SPARC-1
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