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Neural information processing and VLSI

Neural information processing and VLSI (3회 대출)

자료유형
단행본
개인저자
Sheu, Bing Jay. Choi, Joongho.
서명 / 저자사항
Neural information processing and VLSI / by Bing J. Sheu, Joongho Choi ; with special assistance from Robert C. Chang ... [et al.].
발행사항
Boston :   Kluwer Academic Publishers,   c1995.  
형태사항
xix, 559 p. : ill. ; 25 cm.
총서사항
The Kluwer international series in engineering and computer science ;SECS 304
ISBN
0792395476 (acid-free paper)
서지주기
Includes bibliographical references and index.
일반주제명
Neural networks (Computer science) Integrated circuits --Very large scale integration.
비통제주제어
Artificial intelligence,,
000 01123camuuu200301 a 4500
001 000000564932
003 OCoLC
005 19970923154013.0
008 941102s1995 maua b 001 0 eng
010 ▼a 94042945 //r95
015 ▼a GB95-26429
020 ▼a 0792395476 (acid-free paper)
040 ▼a DLC ▼c DLC ▼d UKM
049 ▼a ACSL ▼l 121030869
050 0 0 ▼a QA76.87 ▼b .S52 1995
082 0 0 ▼a 006.3 ▼2 20
090 ▼a 006.3 ▼b S554n
100 1 ▼a Sheu, Bing Jay.
245 1 0 ▼a Neural information processing and VLSI / ▼c by Bing J. Sheu, Joongho Choi ; with special assistance from Robert C. Chang ... [et al.].
260 ▼a Boston : ▼b Kluwer Academic Publishers, ▼c c1995.
300 ▼a xix, 559 p. : ▼b ill. ; ▼c 25 cm.
440 4 ▼a The Kluwer international series in engineering and computer science ; ▼v SECS 304
504 ▼a Includes bibliographical references and index.
650 0 ▼a Neural networks (Computer science)
650 0 ▼a Integrated circuits ▼x Very large scale integration.
653 0 ▼a Artificial intelligence
700 1 ▼a Choi, Joongho.
740 0 1 ▼a Neural information processing and very large-scale integration.

소장정보

No. 소장처 청구기호 등록번호 도서상태 반납예정일 예약 서비스
No. 1 소장처 과학도서관/Sci-Info(2층서고)/ 청구기호 006.3 S554n 등록번호 121030869 (3회 대출) 도서상태 대출가능 반납예정일 예약 서비스 B M

컨텐츠정보

책소개

Neural Information Processing and VLSI provides a unified treatment of this important subject for use in classrooms, industry, and research laboratories, in order to develop advanced artificial and biologically-inspired neural networks using compact analog and digital VLSI parallel processing techniques.
Neural Information Processing and VLSI systematically presents various neural network paradigms, computing architectures, and the associated electronic/optical implementations using efficient VLSI design methodologies. Conventional digital machines cannot perform computationally-intensive tasks with satisfactory performance in such areas as intelligent perception, including visual and auditory signal processing, recognition, understanding, and logical reasoning (where the human being and even a small living animal can do a superb job). Recent research advances in artificial and biological neural networks have established an important foundation for high-performance information processing with more efficient use of computing resources. The secret lies in the design optimization at various levels of computing and communication of intelligent machines. Each neural network system consists of massively paralleled and distributed signal processors with every processor performing very simple operations, thus consuming little power. Large computational capabilities of these systems in the range of some hundred giga to several tera operations per second are derived from collectively parallel processing and efficient data routing, through well-structured interconnection networks. Deep-submicron very large-scale integration (VLSI) technologies can integrate tens of millions of transistors in a single silicon chip for complex signal processing and information manipulation.
The book is suitable for those interested in efficient neurocomputing as well as those curious about neural network system applications. It has been especially prepared for use as a text for advanced undergraduate and first year graduate students, and is an excellent reference book for researchers and scientists working in the fields covered.


Neural Information Processing and VLSI provides a unified treatment of this important subject for use in classrooms, industry, and research laboratories, in order to develop advanced artificial and biologically-inspired neural networks using compact analog and digital VLSI parallel processing techniques.
Neural Information Processing and VLSI systematically presents various neural network paradigms, computing architectures, and the associated electronic/optical implementations using efficient VLSI design methodologies. Conventional digital machines cannot perform computationally-intensive tasks with satisfactory performance in such areas as intelligent perception, including visual and auditory signal processing, recognition, understanding, and logical reasoning (where the human being and even a small living animal can do a superb job). Recent research advances in artificial and biological neural networks have established an important foundation for high-performance information processing with more efficient use of computing resources. The secret lies in the design optimization at various levels of computing and communication of intelligent machines. Each neural network system consists of massively paralleled and distributed signal processors with every processor performing very simple operations, thus consuming little power. Large computational capabilities of these systems in the range of some hundred giga to several tera operations per second are derived from collectively parallel processing and efficient data routing, through well-structured interconnection networks. Deep-submicron very large-scale integration (VLSI) technologies can integrate tens of millions of transistors in a single silicon chip for complex signal processing and information manipulation.
The book is suitable for those interested in efficient neurocomputing as well as those curious about neural network system applications. It has been especially prepared for use as a text for advanced undergraduate and first year graduate students, and is an excellent reference book for researchers and scientists working in the fields covered.



정보제공 : Aladin

목차


CONTENTS

PREFACE = xi

ACKNOWLEDGMENT = xvii

Part Ⅰ PARADIGMS AND MODELS = 1

 1 INTRODUCTION = 3

  1.1 Features of Neural Network Approaches = 4

  1.2 Development History = 7

  1.3 Submicron VLSI Technologies for Digital and Analog Systems = 9

  1.4 The Future with Smart VLSI and Intelligent Machines = 13

  REFERENCES = 17

 2 ARTIFICIAL NEURAL NETWORK ALGORITHMS = 21

  2.1 Hebbian Learning and Perceptron = 21

  2.2 Multi-layered Perceptron Network = 23

  2.3 Recursive Neural Networks and Hopfield Nets = 27

  2.4 Bidirectional Associative Memory Networks = 32

  2.5 Hamming Network and MAXNET = 34

  2.6 Self-Organizing Neural Networks = 35

  2.7 Adaptive Resonance theory Networks = 37

  2.8 Boltzmann Machine = 40

  REFERENCES = 43

 3 OTHER COMPUTATIONAL INTELLIGENCE TOPICS = 47

  3.1 Non-derivative Methods= 47

  3.2 Time-Delay Neural Networks for Time-Series Analysis = 57

  3.3 Genetic Algorithms and Neural Network Applications = 62

  3.4 Soft Processing and fuzzy Systems = 70

  REFERENCES = 72

 4 BIOLOGICALLY - INSPIRED VISION PROCESSING = 75

  4.1 Biologically-Inspired Visual Models = 75

  4.2 Silicon Retina Implementation = 77

  4.3 Other Silicon Retina Approaches = 82

  4.4 Early Vision Processing : Edge Detection = 92

  REFERENCES = 94

 5 CELLULAR NEURAL NETWORKS = 97

  5.1 Basic Theory and Computation Paradigm = 98

  5.2 CNN Universal Machine : Smart Analog Supercomputing = 107

  5.3 Applications, Selected Templates, and Bionic Eyes = 113

  5.4 1-D Cellular Networks for Wireless Communication = 125

  REFERENCES = 145

 6 PARALLELED HARDWARE ANNEALING FOR OPTIMAL SOLUTIONS = 151

  6.1 Optimization Problem and Simulated Annealing = 152

  6.2 Hardware Annealing on Hopfield Networks = 154

  6.3 Hardware Annealing on Cellular Neural Networks = 159

  REFERENCES = 177

Part Ⅱ VLSI DESIGN TECHNOLOGY = 183

 7 DESIGN METHODOLOGIES OF VLSI NEURAL NETWORKS = 185

  7.1 Purely Analog Signal Approach = 185

  7.2 Purely Digital Signal Approach = 191

  7.3 Mixed-Signal Approach = 195

  7.4 Pulse-Coded Method = 202

  7.5 Floating-Gate Approach = 209

  REFERENCES = 215

 8 ANALOG VLSI BUILDING BLOCKS = 221

  8.1 Multiplication-Based Synapse Cells = 221

  8.2 Input and Output Neurons = 224

  8.3 Radial Basis Function Circuits = 231

  8.4 Analog VLSI Fuzzy System Controller = 241

  8.5 Max/Min Fuzzy Logic Circuits = 246

  REFERENCES = 249

 9 DIGITAL VLSI NEUROPROCESSORS = 253

  9.1 The CNAPS Approach = 253

  9.2 The MA16 Multiprocessor = 258

  9.3 Radial Basis Function Chip = 261

  9.4 Various Digital Multiprocessor Chips = 265

  9.5 A Simple-Processor Design Practice = 266

  REFERENCES = 270

Part Ⅲ APPLICATIONS AND SYSTEM PROTOTYPING = 275

 10 BACK-PROPAGTION NEURAL NETWORKS = 277

  10.1 Multi-Layered Neural Networks = 277

  10.2 Reconfigurable Networks = 280

  10.3 Dedicated On-Chip Learning Circuitry = 282

  10.4 Wireless Channel Equalizer Application = 283

  REFERENCES = 295

 11 SELF-ORGANIZATION NEURAL NETWORKS = 297

  11.1 Competitive Learning Neural Networks = 297

  11.2 Hamming Network Design = 300

  11.3 A High-Speed WTA Circuit Design = 303

  11.4 Feature Extraction for Image Compression Application = 314

  REFERENCES = 318

 12 ADVANCED VISION CHIPS AND SYSTEMS = 321

  12.1 Beyond Basic Resistive Network = 321

  12.2 Optical Motion Detection Chip = 326

  12.3 Charge-Coupled Device(CCD) Processors = 328

  12.4 CCD Match-Data Processor for Stereo Vision = 334

  12.5 Biological Architectures = 339

  12.6 A Hippocampal Dentate Gyrus Processor = 343

  12.7 A Sensorimotor Framework And VLSI Implementation = 350

  12.8 Smart Living Machines And Artificial Life = 354

  REFERENCES = 363

 13 PHOTONIC NEURAL NETWORKS = 369

  13.1 Optical Signal Processing and Computing = 369

  13.2 An Automatic Target Recognition System = 374

  13.3 Optoelectronic Implementation of ART-1 Network = 376

  13.4 Optoelectronic Design of ART-2A Network = 379

  13.5 Free-Space Optical Interconnection = 382

  13.6 Wavelength-Division Multiplexing and Micro-optics Networks = 386

  13.7 Superconducting Neural Networks = 389

  REFERENCES = 394

 14 SMART-PIXEL, CELLULAR NEURAL NETWORK, AND CHAOTIC CHIPS = 397

  14.1 Cellular Network Chips with Annealing Capability = 397

  14.2 Optical-Input Smart-Pixel Cellular Networks = 414

  14.3 Switched-Current Design of Discrete-Time Cellular Networks = 421

  14.4 A Video Motion Detection Neuroprocessor = 431

  14.5 Chaotic Attractors and Monolithic Chip Implementation = 442

  14.6 Chaotic Neural Chips = 452

  REFERENCES = 458

 15 VARIOUS SUBSYSTEM AND SYSTEM CONSTRUCTION EXAMPLES = 467

  15.1 Energy-Efficient Neuroprocessors from Jet Propulsion Lab. = 467

  15.2 ANNA Board from AT&T Bell Labs. = 472

  15.3 Analog Neural Co-processor System from Bellcore = 478

  15.4 Analog Neural Computer from U. Penn and Corticon Inc. = 481

  15.5 Silicon Cortex Board from Applied Neurodynamics Inc. = 486

  15.6 selected VLSI Implementatins from Japanese Companies = 488

  REFERENCES = 491

 16 SELECTED COMMERCIAL PRODUCTS FROM INDUSTRY = 495

  16.1 SNAP of HNC Inc. & CNAPS of Adative Solutions Inc. = 495

  16.2 ETANN Chip From Intel Corp. = 498

  16.3 Ni1000 Development System from Nestor Inc. and Intel Corp. = 501

  16.4 SYNAPSE-1 from Siemens Nixdorf = 503

  16.5 FuzzyTECH from Infrom Software Corp., Intel Corp. & TI = 504

  16.6 NeuFuz from National Semiconductor Corp. = 505

  16.7 NeuralWorks Professional Ⅱ/Plus from NeuralWare Inc. = 506

  16.8 TILShell Software and Fuzzy Processors from Togai InfraLogic = 508

  16.9 Neural Network Toolbox from MathWorks Inc. = 509

  16.10 Prometheus Robot from Ubige Software &Robotics Corp. = 510

  16.11 Micro-Roobots of Applied AI Machines & Software Inc. = 510

  REFERENCES = 512

A SPICE CMOS LEVEL-2, LEVEL-4, AND BSIM_PLUS MODEL FILES = 513

 REFERENCES = 519

B BASIC VLSI BUILDING BLOCKS = 521

C CURRENT-MODE CIRCUITS FOR PIECEWISE-LINEAR FUNCTIONS = 529

 REFERENCES = 537

D SELECTED SOFTWARE LISTING = 541

 D.1 Cellular Neural Network = 541

 D.2 C Language Source Listing = 542

 D.3 MatLab Source Listing = 546

BRIEF BIOGRAPHIES OF SPECIAL ASSISTANTS = 549

ABOUT THE AUTHORS = 551

SUBJECT INDEX = 553



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