고려대학교 세종학술정보원

이전 결과로 돌아가기 검색화면

MARC

Synthesizable VHDL design for FPGAs [electronic resource]

자료유형

E-Book(소장)

개인저자

Bezerra, Eduardo Augusto. Lettnin, Djones Vinicius.

서명 / 저자사항

Synthesizable VHDL design for FPGAs [electronic resource] / Eduardo Augusto Bezerra, Djones Vinicius Lettnin.

발행사항

Cham : Springer International Publishing : Imprint: Springer, 2014.

형태사항

1 online resource (vii, 157 p.) : ill.

ISBN

9783319025476

요약

This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company.

일반주기

Title from e-Book title page.

내용주기

Digital Systems, FPGAs and the Design Flow -- HDL Based Designs -- Hierarchical Design -- Multiplexer and Demultiplexer -- Code Converters -- Sequential Circuits, Latches and Flip-Flops -- Synthesis of Finite State Machines -- Finite State Machines as Control Modules -- Processes in Details -- Arithmetic Circuits -- VHDL Design Examples for FPGA Synthesis.

서지주기

Includes bibliographical references.

이용가능한 다른형태자료

Issued also as a book.

일반주제명

VHDL (Computer hardware description language). Field programmable gate arrays.

바로가기

URL

000		00000nam u2200205 a 4500
001		000046048074
005		20201007155306
006		m d
007		cr
008		200916s2014 sz a ob 000 0 eng d
020		▼a 9783319025476
040		▼a 211009 ▼c 211009 ▼d 211009
050	4	▼a TK7888.4
082	0 4	▼a 005.7/1 ▼2 23
084		▼a 005.71 ▼2 DDCK
090		▼a 005.71
100	1	▼a Bezerra, Eduardo Augusto.
245	1 0	▼a Synthesizable VHDL design for FPGAs ▼h [electronic resource] / ▼c Eduardo Augusto Bezerra, Djones Vinicius Lettnin.
260		▼a Cham : ▼b Springer International Publishing : ▼b Imprint: Springer, ▼c 2014.
300		▼a 1 online resource (vii, 157 p.) : ▼b ill.
500		▼a Title from e-Book title page.
504		▼a Includes bibliographical references.
505	0	▼a Digital Systems, FPGAs and the Design Flow -- HDL Based Designs -- Hierarchical Design -- Multiplexer and Demultiplexer -- Code Converters -- Sequential Circuits, Latches and Flip-Flops -- Synthesis of Finite State Machines -- Finite State Machines as Control Modules -- Processes in Details -- Arithmetic Circuits -- VHDL Design Examples for FPGA Synthesis.
520		▼a This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company.
530		▼a Issued also as a book.
538		▼a Mode of access: World Wide Web.
650	0	▼a VHDL (Computer hardware description language).
650	0	▼a Field programmable gate arrays.
700	1	▼a Lettnin, Djones Vinicius.
856	4 0	▼u https://oca.korea.ac.kr/link.n2s?url=http://dx.doi.org/10.1007/978-3-319-02547-6
945		▼a KLPA
991		▼a E-Book(소장)

소장정보

중앙도서관

No.	소장처	청구기호	등록번호	도서상태	반납예정일	예약	서비스
No. 1	소장처 중앙도서관/e-Book 컬렉션/	청구기호 CR 005.71	등록번호 E14034133	도서상태 대출불가(열람가능)	반납예정일	예약	서비스 M

Synthesizable VHDL design for FPGAs [electronic resource]

소장정보

청구기호 브라우징

관련분야 인기자료

관련분야 신착자료