상세정보

VLSI of electronic circuits and systems needs interdisciplinary work by device physicists, process developers, circuit designers, design automation specialists, and computer architects. This book covers all these topics from semiconductor devices to systems in a compact manner. The text outlines the latest advances in semiconductor devices for VLSI circuits, but also includes simple and easy to use analytical models as well as results of device simulation.

Modern electronics is concerned with implementing hardware functions in semiconductor chips and the software that runs these semiconductor circuits. Very large scale integration (VLSI) of electronic circuits and systems needs interdisciplinary work by device physicists, process developers, circuit designers, design automation specialists, and computer architects. This book covers all these topics, from semiconductor devices to systems, in a compact manner. The text outlines the latest advances in semiconductor devices for VLSI circuits, but also includes simple and easy to use analytical models as well as results of device simulation. The section on circuits gives an overview of basic bipolar and field-effect transistor gates and is mainly devoted to CMOS standard cells and functional blocks (macrocells). The section on systems outlines the top-down design style of digital systems (mainly processors and memories) using functional blocks described in the previous circuit part. Finally some problems of testing and details of physical layout of chips are considered.

정보제공 :

CONTENTS
LIST OF SYMBOLS = xv
1 BASIC SEMICONDUCTOR STRUCTURES = 1
 1.1. Charge carriers in semiconductors = 1
  1.1.1 Electrons and holes in intrinsic and doped semiconductors = 1
  1.1.2 Energy-band diagrams = 1
  1.1.3 Temperature dependence of charge carrier densities = 4
  1.1.4 Energy distribution of charge carriers = 6
  1.1.5 Impact ionization(avalanche effect) = 7
  1.1.6 Photogeneration = 7
  1.1.7 Recombination = 9
  1.1.8 Current flow = 10
  1.1.9 The basic equations describing the macroscopic behaviour of semiconductor devices = 13
 1.2 Resistors = 14
 1.3 MOS and insulation-layer capacitors = 18
 1.4 p-n junctions and p-n junction capacitors = 24
  1.4.1 Introduction = 24
  1.4.2 Space-charge layer = 26
  1.4.3 Space-charge layer capacitance = 31
  1.4.4 Current-voltage characteristics = 32
  1.4.5 Heterojunctions = 38
  1.4.6 Semiconductor diodes as rectifiers = 38
  1.4.7 Semiconductor switching and charge-storage varactor diodes = 41
  1.4.8 Temperature dependence = 45
 1.5 Metal-semiconductor contacts = 46
  1.5.1 Overview = 46
  1.5.2 Schottky diodes = 49
  1.5.3 The potential barrier of a metal-semiconductor contact = 51
 1.6 Interconnection lines = 53
 1.7 Problems = 55
2 TRANSISTORS = 60
 2.1 Bipolar transistors = 60
  2.1.1 Bipolar transistor structures for VLSI = 61
  2.1.2 Currents in planar and heteroemitter transistors = 62
  2.1.3 Lateral transistors = 66
  2.1.4 Polysilicon emitters = 68
  2.1.5 I／V characteristics = 70
   Ideal characteristics = 70
   The Early effect = 72
   Temperature effects = 74
   Second-order effects = 76
  2.1.6 Network models = 78
   Large-signal model = 78
   Small-signal model = 81
  2.1.7 High-frequency behaviour = 83
  2.1.8 Small-signal amplifier stages = 86
  2.1.9 Switching behaviour = 88
  2.1.10 Physical implementation(layout) = 94
 2.2 MOS field-effect transistors = 97
  2.2.1 Principles of operation and MOS transistor structures for VLSI = 97
  2.2.2 I／V characteristics in strong and weak inversion = 100
   Enhancement transistors = 100
   Depletion transistors = 109
   SOI transistors = 110
  2.2.3 Temperature effects = 115
  2.2.4 Small-geometry effects = 115
   Device scaling = 115
   Short- and narrow-channel effects = 116
   Subthreshold currents = 119
   High-field effects = 124
   Effect of series resistors = 129
   Parasitic transistor and thyristor effects(snap-back, latch-up) = 130
  2.2.5 Network models = 137
   Large-signal model = 137
   Small-signal model = 140
  2.2.6 High-frequency behaviour = 142
  2.2.7 Switching behaviour = 145
  2.2.8 Physical implementation = 149
 2.3 GaAs field-effect transistors = 150
  2.3.1 Fundamentals of junction field-effect transistors = 150
  2.3.2 MESFET = 153
  2.3.3 HEMT = 156
 2.4 Problems = 160
3 SEMICONDUCTOR CIRCUITS = 168
 3.1 Basic gates for digital circuits = 168
  3.1.1 Basic gates in silicon MOS technology = 168
   NMOS = 168
   CMOS = 173
   BICMOS = 174
  3.1.2 Basic gates in GaAs field-effect technology = 176
   BFL = 176
   SDFL = 177
   DCFL = 178
  3.1.3 Basic gates in silicon bipolar technology = 178
   TTL = 178
   ECL and CML = 182
   I²L = 184
   ISL = 187
   STL = 187
 3.2 Standard cells and macrocells = 188
  3.2.1 Transfer gates = 189
  3.2.2 Logic gates = 190
  3.2.3 Multiplexers = 194
  3.2.4 Decoders = 194
  3.2.5 Matrix structures(NOR and ROM) = 196
  3.2.6 PLA, FPLA, and PAL = 197
  3.2.7 Barrel shifters = 200
  3.2.8 Arithmetic-logic units = 201
  3.2.9 Flip-flops = 207
  3.2.10 Register files = 208
   Memory registers = 208
   Shift registers = 211
  3.2.11 Counters and timers = 215
  3.2.12 I／O circuits = 220
 3.3 Principles of simulation = 221
  3.3.1 Network simulation = 222
  3.3.2 Timing simulation = 223
  3.3.3 Switch-level simulation = 224
  3.3.4 Logic gate simulation = 225
 3.4 Problems = 225
4 VLSI SYSTEMS = 235
 4.1 Introduction = 235
  4.1.1 The evolution of VLSI systems = 235
  4.1.2 Design style = 237
 4.2 Data types and instruction formats = 241
 4.3 Data-path architectures = 245
  4.3.1 Bit-serial and bit-parallel architectures = 246
  4.3.2 General-purpose processors = 247
  4.3.3 Digital signal processors(DSP) = 254
  4.3.4 Floating-point processors = 255
  4.3.5 Data processing arrays = 260
 4.4 The control path = 264
  4.4.1 Principles = 264
  4.4.2 Microprogrammed control = 271
  4.4.3 Design example = 272
   System level(system definition) = 272
   Algorithmic level = 272
   Function／register level = 274
   Logic-level = 274
   Completion = 279
 4.5 Semiconductor memories = 279
  4.5.1 Overview = 279
  4.5.2 Random-access memories(RAM) = 281
   Static RAM = 281
   Dynamic RAM = 285
  4.5.3 ROM, EPROM, and EEPROM = 291
  4.5.4 Content-addressable memory(CAM) = 295
  4.5.5 Cache = 297
  4.5.6 Memory management unit(MMU) = 303
 4.6 Problems of testing = 306
  4.6.1 Fault models = 307
  4.6.2 Design for testability = 309
  4.6.3 Built-in self-test = 309
  4.6.4 PLA test = 312
  4.6.5 Wafer testers = 312
 4.7 Problems = 314
5 PHYSICAL DESIGN CONSIDERATIONS = 321
 5.1 Layout design = 321
  5.1.1 Overview = 322
  5.1.2 Hand-honed layout = 322
  5.1.3 Symbolic methods = 327
  5.1.4 Standard cell design = 328
  5.1.5 Gate arrays = 329
  5.1.6 Macrocell design = 331
  5.1.7 Silicon compiler = 334
  5.1.8 Comparison = 334
  5.1.9 Layout verification = 337
 5.2 Thermal considerations = 337
 5.3 Problems = 341
REFERENCES = 342
INDEX = 349